发明名称 Digital cmos output buffer having separately gated pull-up and pull-down devices
摘要 The CMOS output buffer (10) includes a pull-up device (112) and a pull-down device (114) connecting in series between a voltage source and a ground. A fast-rise/slow-fall inverter (116) is connected between an input line (118) and a gate of the pull-up device. A slow-rise/fast-fall inverter (120) is connected between the input line and a gate of the pull-down device (114). The fast-rise/slow-fall inverter (116) switches a signal from a low voltage level to a high voltage level faster than the slow-rise/fast-fall (120) inverter switches the signal from the low voltage level to the high voltage level.
申请公布号 AU4202199(A) 申请公布日期 1999.12.20
申请号 AU19990042021 申请日期 1999.05.24
申请人 QUALCOMM INCORPORATED 发明人 CHARLES JAMES PERSICO
分类号 H03K19/00;H03K19/094 主分类号 H03K19/00
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