发明名称 Multiple-valued logic circuit architecture: supplementary symmetrical logic circuit structure (sus-loc)
摘要 Circuit structure and resulting circuitry for multiple-valued logic. The circuit structure allows the design and fabrication of any r-valued logic function of n-places where r is an integer greater than 1 and n is an integer greater than 0. This structure is called SUpplementary Symmetrical LOgic Circuit structure (SUS-LOC). In circuits incorporating SUS-LOC, circuit branches are realized that uniquely deliver circuit response and output. For some circuits, and due to the operating characteristics of the switch elements, additional circuit elements, or stages, must be incorporated to prevent "back biasing." SUS-LOC is fully active. Only active elements perform logic synthesis and those components not directly related to logic synthesis, such as resistors and/or other passive loads, are relegated the task of circuit protection. The fabrication of r-valued, multi-valued, or multiple-valued logic circuits, designed using the definitions of the SUS-LOC structure can be accomplished with known techniques, materials, and equipment.
申请公布号 AU4407399(A) 申请公布日期 1999.12.20
申请号 AU19990044073 申请日期 1999.05.21
申请人 EDGAR DANNY OLSON 发明人 EDGAR DANNY OLSON
分类号 H03K19/20;H03K19/00;H03K19/094 主分类号 H03K19/20
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