摘要 |
A digital signal processor (DSP) control apparatus includes a DSP, estimation unit, calculation unit, and clock generator. The DSP performs digital signal arithmetic processing using a clock having a variable frequency. The estimation unit estimates an arithmetic processing amount of the DSP. The calculation unit calculates a new clock frequency on the basis of an estimated arithmetic processing amount from the estimation unit. The clock generator supplies a clock having a frequency calculated by the calculation unit to the DSP. |