发明名称 DSP control apparatus and method
摘要 A digital signal processor (DSP) control apparatus includes a DSP, estimation unit, calculation unit, and clock generator. The DSP performs digital signal arithmetic processing using a clock having a variable frequency. The estimation unit estimates an arithmetic processing amount of the DSP. The calculation unit calculates a new clock frequency on the basis of an estimated arithmetic processing amount from the estimation unit. The clock generator supplies a clock having a frequency calculated by the calculation unit to the DSP.
申请公布号 GB9924159(D0) 申请公布日期 1999.12.15
申请号 GB19990024159 申请日期 1999.10.12
申请人 NEC CORPORATION 发明人
分类号 G06F1/04;G06F1/32;G06F7/48;H04B1/40;H04B1/707;H04B7/26;H04J13/00;H04W52/02 主分类号 G06F1/04
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