| 摘要 |
A servo circuit comprising speed error detecting means (1044, 1050) for detecting a speed error which is a frequency difference between a reproduced clock signal which is reproduced from a recording medium and a reference clock signal; phase error detecting means (1078, 1084, 1092) for detecting a phase error which is a phase difference between the reproduced clock signal and the reference clock signal; and servo signal generating means (1052, 1054, 1057, 1058, 1060, 1094, 1064) for generating a servo signal which is used for eliminating the speed error and phase error, wherein said phase error detecting means comprises: first and second frequency dividing means (1078, 1084) for performing frequency dividing on the reproduced clock signal and the reference clock signal, respectively, characterised by a frequency dividing ratio being changed according to a change of a speed error gain of said speed error detecting means; and phase comparing means (1092) for detecting a phase error between the frequency-divided reproduced clock signal and the frequency-divided reference clock signal. <IMAGE> |
