发明名称 |
Apparatus and methods for performing arithimetic operations on vectors and/or matrices |
摘要 |
A multiply-multiply-accumulate (MMA) system (10) efficiently evaluates matrix products X=F*C. Matrix C is dissected into submatrices A and B taking advantage of symmetry in C. LOG unit (14) converts B, A, and F to LOG values B', A' and F'. These are summed in K parallel calculating units CU's (18) and converted back to Normal domain as P=F*B*A in ALOG units (22) and sent to accumulators ACU's (24). The ACU's (24) accumulate the results. An output buffer (26) combines the results. The B', A' values (32,34) are held in a cache memory (20) and the LOG sums are performed in two steps with intermediate storage.
|
申请公布号 |
US6003058(A) |
申请公布日期 |
1999.12.14 |
申请号 |
US19970924288 |
申请日期 |
1997.09.05 |
申请人 |
MOTOROLA, INC. |
发明人 |
KIRSCHENBAUM, JACOB A.;BARAK, ITZHAK;EFRAT, YACOV;PAN, SHAO WEI |
分类号 |
G06F17/16;(IPC1-7):G06F17/16 |
主分类号 |
G06F17/16 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|