发明名称 Voltage regulation circuit with adaptive swing clock scheme
摘要 A CMOS voltage regulator uses clock signals from an adaptive swing clock generator to control the output voltage of a charge pumping circuit. A divided portion of the output voltage is fed to a differential amplifier, where it is compared to a pre-set reference voltage. A negative feedback signal is generated from the differential amplifier and inputted to the adaptive swing clock generator, where it causes the clock signals to change amplitude in an inverse relationship to changes in the output voltage. When the divided portion of the output voltage equals the pre-set reference voltage, a steady-state output voltage condition is achieved.
申请公布号 US6002599(A) 申请公布日期 1999.12.14
申请号 US19980064283 申请日期 1998.04.22
申请人 INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE 发明人 CHOW, HWANG-CHERNG
分类号 G11C5/14;H02M3/07;(IPC1-7):H02M3/18;G05F1/40 主分类号 G11C5/14
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