发明名称 |
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND MANUFACTURE THEREOF |
摘要 |
PROBLEM TO BE SOLVED: To provide a technology which can realize the high-reliability DRAM by improving the refleshing characteristics without complicating the manufacturing process. SOLUTION: A p-type semiconductor region 24 for adjusting a threshold voltage is formed only at a p-type well 4 on the side of a data line 18 of a memory-cell selecting MISFET(metal-insulator semiconductor field-effect transistor) Qs. The impurity concentration of the p-type well 4 on the side of an information storing capacitor element is set so that the concentration is lower than the impurity concentration of the p-type well on the side of the data line 18. This, 1.1 V of the threshold voltage of the memory-cell selecting MISFET Qs is obtained. An the same time, the junction electric-field intensity an the end of a gate electrode 7 on the side of the information storing capacitor element can be decreased. |
申请公布号 |
JPH11345947(A) |
申请公布日期 |
1999.12.14 |
申请号 |
JP19980152538 |
申请日期 |
1998.06.02 |
申请人 |
HITACHI LTD |
发明人 |
OYU SHIZUNORI;ASAKURA HISAO;KAWAKITA KEIZO |
分类号 |
H01L29/78;H01L21/8238;H01L21/8242;H01L27/092;H01L27/108 |
主分类号 |
H01L29/78 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|