发明名称 METHOD FOR REDUCING STRAIN OF FLIP CHIP ELECTRONIC DEVICE WITH UNDERFILLING, AND ITS APPARATUS
摘要 PROBLEM TO BE SOLVED: To improve the reliability on a semiconductor ball grid array and a chip-size package through profiling of selected temperature in attachment by solder and underfill processing. SOLUTION: This method applies to a semiconductor device which includes an integrated circuit chip, a substrate 14 which is electrically insulated, many solder balls having both its parts jointed, being placed in a space of a gap 16, and a copolymer cover material for filling the gap 16, and its manufacture. The manufacture includes heating and cooling cycles which based on distortion modeling, and all the mechanical distortions of the dielectric layer of a circuit chip 10 and of the solder balls are reduced to a level which is safe for the operation of semiconductor components.
申请公布号 JPH11345836(A) 申请公布日期 1999.12.14
申请号 JP19990121398 申请日期 1999.04.28
申请人 TEXAS INSTR INC <TI> 发明人 THOMAS SUNIL
分类号 H01L21/60;H01L21/56 主分类号 H01L21/60
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