发明名称
摘要 An input-output wiring for the power circuit and a ground layer are formed on a metal substrate of a power hybrid integrated circuit apparatus. A plurality of windows are opened at predetermined positions of a circuit substrate to which electronic parts such as an IC driver, a chip resistor etc. are connected. Ceramic chips are soldered on the exposed surface of the metal substrate in the windows, and the power semiconductor elements are connected through metal bridges on the ceramic chips. Connection between lower electrode of adjoining power semiconductor elements or between lower part of the power semiconductor element and an input/output wiring is made by means of a part of the metal bridge.
申请公布号 JP2988243(B2) 申请公布日期 1999.12.13
申请号 JP19940045367 申请日期 1994.03.16
申请人 HITACHI SEISAKUSHO KK 发明人 TAKAHASHI MASAAKI;YAMADA KAZUJI;MYAZAKI HIDEKI;KATO KAZUO
分类号 H05K1/05;H01L23/14;H01L25/16;H05K1/03;H05K1/14;H05K3/22 主分类号 H05K1/05
代理机构 代理人
主权项
地址