发明名称 TIME CONSTANT CIRCUIT USING DSP
摘要 <p>PROBLEM TO BE SOLVED: To set the coefficient of a multiplier at the input side of a time constant circuit as a large value, and to reduce an arithmetic error even at the time of setting a large time constant by operating the decimation of an input signal, and operating a time constant processing. SOLUTION: A signal processing is operated through a digital signal input terminal 11, decimator 12 whose decimation rate is 1/M, time constant circuit 13, interpolator 14 whose interpolation rate is M, smoothing filter 15, and digital signal output terminal 16. In this processing, an inputted digital signal is preliminarily thinned-out into 1/M, and then processed so that signal change can be smoothed by the time constant circuit 13, and the obtained signal is interpolated M times, and then smoothed and outputted. Thus, it is possible to set the coefficient of a multiplier constituting the time constant circuit as a large value, and to reduce an arithmetic error even at the time of setting a large time constant.</p>
申请公布号 JPH11340787(A) 申请公布日期 1999.12.10
申请号 JP19980142464 申请日期 1998.05.25
申请人 NEW JAPAN RADIO CO LTD 发明人 OUCHI KAZUAKI;CHIBA KOICHI
分类号 H03H17/00;H03H17/02;(IPC1-7):H03H17/00 主分类号 H03H17/00
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