| 摘要 |
PROBLEM TO BE SOLVED: To convert resolution without damaging the image quality of an original image. SOLUTION: A sampling clock generation circuit 51 changes the frequency of a sampling clock CLK of an A/D converter 2, in accordance with a horizontal scan frequency of a signal Vin so that one line of the input video signal Vin is sampled by a standard number of pixels. A read address generation circuit 53 calculates a vertical address after expansion or reduction and reads each pixel data in lines, which are the closest and the second closest to the address from memories 3a and 3b. An interpolation operation circuit 4 performs linear interpolation operation based on two read pixel data and calculates pixel data after conversion. |
