发明名称 DIFFERENTIAL AMPLIFIER CIRCUIT WITH HYSTERISIS
摘要 <p>PROBLEM TO BE SOLVED: To provide a differential amplifier circuit with hysterisis capable of setting a hysterisis width to a desired size. SOLUTION: In first and second transistors 1 and 2 for performing differential amplification, collectors are both bisected, one collector of the first transistor 1 is connected to the collector of a fifth transistor and the collector of a third transistor 3 constituting a current mirror circuit as an active load through a first diode 25 and one collector of the second transistor 2 is connected to the collector of a sixth transistor 6 and the collector of a forth transistor 4 through a forth diode 28. By temporarily shunting a part of a collector current respectively when the first transistor 1 is turned to an operation state and when the second transistor 2 is turned to the operation state, the hysterisis is generated.</p>
申请公布号 JPH11340749(A) 申请公布日期 1999.12.10
申请号 JP19980159993 申请日期 1998.05.26
申请人 NEW JAPAN RADIO CO LTD 发明人 TAKAYANAGI MASAYUKI
分类号 H03F3/45;(IPC1-7):H03F3/45 主分类号 H03F3/45
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