发明名称 |
Schaltungsanordnung zur Ausführung von bedingten Verzweigungsbefehlen in einem Pipelineprozessor |
摘要 |
A circuit for executing conditional branch instructions in a pipeline process comprises registers for retaining condition codes settled at different stages, respectively, registers for retaining pipeline tags identifying instructions at the respective stages and indicating the stage where the condition codes are settled, and a branch controller for deciding settlement of condition codes for conditional branch instructions existing at the respective stage according to the tags in a plurality of stages, and for selecting the settled condition codes from among the condition codes stored in the registers. <IMAGE> |
申请公布号 |
DE69230230(D1) |
申请公布日期 |
1999.12.09 |
申请号 |
DE1992630230 |
申请日期 |
1992.01.29 |
申请人 |
FUJITSU LTD., KAWASAKI |
发明人 |
ASAKAWA, TAKEO;INOUE, AIICHIRO |
分类号 |
G06F9/32;G06F9/38;(IPC1-7):G06F9/38 |
主分类号 |
G06F9/32 |
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