| 摘要 |
A novel small-area NDR-based circuit can be used to implement a variety of semiconductor circuits, including high-density SRAM cells and power thyristor structures. In one example embodiment, the NDR-based circuit uses a thin vertical PNPN structure (10) with capacitively-coupled gate-assisted turn-off and turn-on mechanisms. An SRAM based on this new cell is comparable in cell area, standby current, architecture, speed, and fabrication process to a DRAM of the same capacity. In one embodiment, an NDR-based SRAM cell consists of only two elements, can operate at high speeds and low voltages, has a good noise-margin, and is compatible in fabrication process with main-stream CMOS. This cell significantly reduces standby power consumption. |
