发明名称 LOGIC GATE
摘要 The invention relates to a logic gate having at least one input terminal (IN) in which a digital input signal is applied having two possible logical signal values and at least one output terminal (OUT) to output an output signal having a logical signal value. Two different logical voltage levels (HIGH, LOW) are allocated to both possible logical signal values of the output signal and a logic circuit (2) is provided between the input and the output terminals (IN, OUT), said circuit having several switching elements, especially switching transistors, working or produced according to the logical voltage level (HIGH, LOW), said logic circuit (2) being supplied by a supply potential (PUP) exceeding the logic voltage level (HIGH, LOW). The logic circuit (2) has at least two switching elements (MN21, MN22; MP21, MP22), especially switching transistors, in the output path allocated to the output terminal (OUT).
申请公布号 WO9963668(A1) 申请公布日期 1999.12.09
申请号 WO1999DE01618 申请日期 1999.06.01
申请人 SIEMENS AKTIENGESELLSCHAFT;NEBEL, GERHARD 发明人 NEBEL, GERHARD
分类号 H03K19/003 主分类号 H03K19/003
代理机构 代理人
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