Semiconductor intergrated circuit memory and bus control method

摘要

A semiconductor integrated circuit memory comprises banks (4, 24) each having at least one memory cell array (12, 32) and connected to a first data bus (200). Each of the banks (4, 24) includes a control part (8, 28) which is supplied with information indicated by a command and thus controls a data write or read operation on a corresponding bank. The control part controls data write and read operations on the corresponding bank so that the corresponding bank is prevented from occupying the first data bus until read data is output to the first data bus by the data read operation. <IMAGE>