| 摘要 |
A sense amplifier circuit is disclosed which has an amplifier circuit stage 11 outputting a intermediately signal S and SB having a first level voltage which makes a driver circuit M7 and M8 of the output circuit stage 12 into turn off when the sense amplifier circuit SA1 is in a inactive state. As a result, circuits which bring the driver circuit to a high impedance state can be unnecessitated. Accordingly, load capacities added to the output nodes A and B of the amplifier circuit stage 11 can be reduced to realize an operation of high speed, and markedly reduce the number of circuit elements.
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