发明名称 Explicit rate marking for flow control in atm networks
摘要 An explicit rate marking system comprises virtual bandwidth value generator module and an explicit rate value generator module. The virtual bandwidth value generator module generates a virtual bandwidth value reflecting an available bandwidth capacity value, an explicit rate value associated with each bottlenecked virtual circuit for which the switching node (12) forms part of a path (13) and a minimum cell rate value associated with each unbottlenecked virtual circuit for which the switching node (12) forms part of a path (13). The explicit rate value generator module generates the explicit rate value in relation to the virtual bandwidth value and the minimum cell rate value associated with the virtual circuit and other virtual circuits for which the switching node (12) forms part of the path (13).
申请公布号 AU4081499(A) 申请公布日期 1999.12.06
申请号 AU19990040814 申请日期 1999.05.17
申请人 ASCEND COMMUNICATIONS, INC. 发明人 TAO YANG;PING WANG;WENGANG ZHAI
分类号 H04L12/54;H04L12/70;H04L12/801;H04L12/825;H04L12/935;H04Q11/04 主分类号 H04L12/54
代理机构 代理人
主权项
地址