发明名称 Switching network providing multiple timing paths for port circuits
摘要 Establishing a plurality of timing paths through a switching network that has a plurality of independent switching units with each switching unit switching one bit of each group of data from a given external data link through the switching network. Each switching unit establishes a path to each of a plurality of port timing units where each port timing unit controls a set of port units. Further, each port timing unit is responsive to timing information received on the plurality of timing paths to utilize the timing information to provide timing to its set of port units. Each port timing unit comprises timing difference detectors with each timing difference detector determining a difference in timing between an individual one of the plurality of timing paths and timing generated by the timing unit. Each of the port timing units is responsive to the difference in timing for adjusting the timing of the port timing unit to agree with the timing of the central timing unit. In addition, each of the port timing units determines which of the timing paths have valid timing information and utilizes the valid timing information to calculate the difference to adjust the timing of the port timing unit. Also, the determination of valid timing information is performed by the port timing unit doing a statistical analysis on the timing differences determined by the timing difference detectors.
申请公布号 US5999543(A) 申请公布日期 1999.12.07
申请号 US19970921673 申请日期 1997.08.29
申请人 LUCENT TECHNOLOGIES INC. 发明人 BORTOLINI, JAMES R.
分类号 H04J3/00;H04J3/06;H04Q3/00;H04Q11/04;(IPC1-7):H04J3/06;H04L7/00 主分类号 H04J3/00
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