| 摘要 |
A data processing system includes a backplane and a plurality of logic boards connected to the backplane by a plurality of connectors. A set of common points (23) is electrically coupled to the connectors by individual conductive traces between each common point and the corresponding pins of the connectors. The inductance of longer traces is reduced by merging traces near a central portion of the backplane to form a conductive region (23) that extends to at least one connector (34, 31) on either side of the common points, thereby electrically shortening the longer traces. The inductance is further reduced by widening the longer traces. Longer traces are wider than shorter traces to reduce the differences in the LC products associated with each trace and, therefore, the differences in delay among the traces. |
