发明名称 Verfahren und Einrichtung zur digitaler algorithmischer Hochgeschwindigkeitsdatenrückgewinnung
摘要 An all digital data algorithmic recovery method and apparatus which operates at jitter greater than 25% and where run length is more than 1000 bits and which uses self calibrated delay elements to phase align a locally generated time ruler reference with the data average transition position to reliably establish the sampling time for retrieving data from an incoming binary sequence at the center of the data eye. The phase adjusted time ruler signal is used to sample transition positions of the data and the sampled data is statistically analyzed in a state machine wherein the time ruler is a broadband signal comprising a first and second base frequency and wherein the period of one of said frequencies is <MATH> where FR equals the receiver local clock frequency and FT equals the frequency of the distant clock.
申请公布号 DE69326882(D1) 申请公布日期 1999.12.02
申请号 DE1993626882 申请日期 1993.11.17
申请人 ADVANCED MICRO DEVICES, INC. 发明人 GUO, BIN
分类号 H04L7/027;H03L7/081;H04L7/033;H04L25/02;H04L25/03;(IPC1-7):H03L7/081 主分类号 H04L7/027
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