METHOD AND DEVICE FOR TESTING CONTENT ADDRESSABLE MEMORY CIRCUIT AND CONTENT ADDRESSABLE MEMORY CIRCUIT WITH REDUNDANCY FUNCTION

摘要

Automatic generation of a test pattern for test data to test a content addressable memory for failure is disclosed. An inverter (INV1) inverts a scan signal (SODI) outputted from a scan path to apply the inverted scan signal to a 1-input of a selector (SEL1). A scan input (SIDI) is the inverted version of a scan output from a scan flip-flop (SFF-D12). To test a content addressable memory (100), a test signal (CAMTEST) is set to "1", thereby producing input signals (DI0, DI1, DI2) in such a looped manner as: (0, 0, 0)->(1, 0, 0)->(1, 1, 0)->(1, 1, 1)->(0, 1, 1)->(0, 0, 1)->(0, 0, 0)-> . . . .