| 摘要 |
PROBLEM TO BE SOLVED: To restrict the width of a channel-cut diffused region to a minimum by a method, wherein a polysilicon pattern is used as a self-aligning mask and furthermore a spacer pattern in formed at the end face in a self-aligning process. SOLUTION: A gate structure is used as a self-aligning mask, and Asd<+> is introduced into Si substrate 11 by ion implantation, and N<+> -type diffused regions 11A, 11B, 11C are formed in a self-aligning manner adjacent to the gate structure. Furthermore, a sidewall oxide film 19 is formed on the gate structure. Yet further, an interlayer insulation film is formed over the structure of (A) to (D), and then via a contact hole formed corresponding to the diffused regions 11A to 11C in the interlayer insulation film, an ohmic electrode is brought into contact with the corresponding diffused region. Here, since an ion implantation process of forming a channel-cut region 11b is carried out via a polysilicon sidewall film 16A formed on an end face of a polysilicon layer 16, the width of the channel-cut region 11b can be formed small. |
