| 摘要 |
PROBLEM TO BE SOLVED: To provide a DRAM cell device which can be manufactured at a high packing density and at a minimal process cost. SOLUTION: A memory cell is comprised of a semiconductor substrate 1, having protrusions V disposed in row and columns. In this case, a first source/ drain region S/D1 of a selective transistor and a channel region Ka disposed on its underside are provided in each protrusion V. A second source/drain region S/D2 of the selective transistor is embedded in the semiconductor substrate. The first source/drain area S/D1 is electrically coupled to a first capacitor electrode of a storage capacitor. A second capacitor electrode of the storage capacitor is separated from the first capacitor electrode by a capacitor dielectrics Kd, is disposed on the first capacitor electrode and is coupled electrically to a bit line B. |
