System and method for concurrent processing

摘要

A processor and associated memory device that includes a fetcher for fetching instructions stored in the memory device. Each instruction constitutes either a value generating instruction or a non-value generating instruction. The processor further including a decoder for decoding the instructions, an issue unit for routing decoded instructions to an execution unit. The processor further having a predictor being responsive to a first set of instructions, from among the value generating instructions, for predicting, with respect to each one instruction in said first set of instructions, a predicted value that is determined on the basis of a prediction criterion which includes: (i) a previous value generated by the instruction; and (ii) at a stride.