| 发明名称 |
Conversion of a fixed point and floating point numbers |
| 摘要 |
The computer system has a process for conversion of a fixed point number into a floating point form. The fixed point number is entered in scalar form into a register (902) in a first register architecture sequence and is subjected to the conversion process before being entered in floating point form into a second register (906) in compressed form.
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| 申请公布号 |
DE19920214(A1) |
申请公布日期 |
1999.11.25 |
| 申请号 |
DE19991020214 |
申请日期 |
1999.04.29 |
| 申请人 |
INTEL CORP., SANTA CLARA |
发明人 |
ABDALLAH, MOHAMMED A. F.;HUFF, THOMAS R.;ROUSSEL, PATRICE;HSIEH, HSIEN-CHENG E.;PENTKOWSKI, VLADIMIR;THAKKAR, SHREEKANT S. |
| 分类号 |
G06T1/20;H03M7/24;(IPC1-7):G06F7/48 |
主分类号 |
G06T1/20 |
| 代理机构 |
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代理人 |
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