| 摘要 |
A controller for a digital processor includes a random access memory, e.g., an instruction memory, that consumes significant power when operating. To reduce the power consumption when repetitive instructions, i.e. loops, are being performed, the loop instructions are stored in and accessed from a shift register rather than from the random access memory without any special instructions defining the loop. A memory control includes a state tracking machine that monitors the execution of the program instructions and determines therefrom when a loop has been entered, whereupon it enables the shift register to produce the loop instructions stored therein and disables the instruction memory from producing instructions until the loop is exited. The foregoing process is automatically initiated for each loop, whether the loop is a new loop, a loop within a loop or a multiple loop. The present controller does not require special instructions either preceding or following a loop to specify the start or end points of the loop, or the number of instructions in the loop, or the number of times the loop is to be performed; but rather it determines the presence of a loop automatically from the executable micro-code instructions that execute the loop. |
