| 摘要 |
A multi-function UART (universal asynchronous receiver transmitter) for use in a data processing system, includes an interface (10) for connection to a host CPU bus (20); a transmitter FIFO (11) connected to the interface (10); a parallel-to-serial converter (12) connected to an output of the transmitter FIFO (11) to provide a serial data stream; a pulse shaper (13) for controlling the pulse length of each output pulse of the parallel-to-serial converter (12) according to value of the corresponding serial bit; output selector (14) for selecting one of outputs of the parallel-to-serial converter (12) and the pulse shaper (13); a receiver input stage (15) having a pulse width discriminator (18) and a clock recovery circuit (19); a serial-to-parallel converter (16) connected to an output of the receiver input stage; and a receiver FIFO buffer (17) connected between the serial-to-parallel converter (16) and the interface (10).
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