Method and apparatus for parallel addressing of an image processing memory

摘要

A method and apparatus for addressing a parallel image processing memory provides a plurality of random access memories arranged in an array in a set of array rows and array columns. Each of the memories has addresses for storing image pixel data that are arranged identically to each other. Each of the random access memories stores the group of image pixel data at the identical addresses. The entire group of image pixel data is stored in each of the plurality of random access memories. The random access memories can be constructed from a plurality of individual random access memory structures that are joined as a single memory storage unit, or buffer that enables one image pixel data to be addressed in each addressing cycle. An image processor generates address values for accessing the group of image pixel data over a plurality of address lines interconnected with respective of the plurality of buffers. The image processor manipulates the group of image pixel data. In particular, the image processor accesses each of a plurality of different image pixel data from the group in each of the plurality of buffers, respectively. The pixel data in each of the plurality of buffers can have a different preprocess operation performed to it prior to storage in a respective of the plurality of buffers.