发明名称 Method of forming via
摘要 A method of forming a via. A substrate having a first conductive layer thereon is provided. An inter-metal dielectric layer is formed over the substrate layer by high density plasma chemical vapor deposition. An etch stop layer is formed on the inter-metal dielectric layer. An oxide layer is formed on the etch stop layer. The oxide layer is defined, so that a shallow opening aligned with the first conductive layer is formed to exposed the inter-metal dielectric layer. The inter-metal dielectric layer is etched away within the shallow opening until the first conductive layer is exposed. The opening is filled with a second conductive layer. The oxide layer is defined by photolithography and etching with a first selectivity, with which the oxide layer has a comparable etching rate to the etch stop layer. The inter-metal dielectric layer is etched with a second selectivity, with which the inter-metal dielectric layer has an etching rate higher than the etch stop layer.
申请公布号 US5981379(A) 申请公布日期 1999.11.09
申请号 US19980139872 申请日期 1998.08.25
申请人 UNITED MICROELECTRONICS CORP. 发明人 TSAI, MENG-JIN
分类号 H01L21/768;(IPC1-7):H01L21/476;H01L21/302;H01L23/48 主分类号 H01L21/768
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