发明名称 DESYNCHRONIZER FOR A SYNCHRONOUS DIGITAL COMMUNICATIONS SYSTEM
摘要 A desynchonizer for a synchronous digital communications system serves to recover a useful signal from a synchronous digital input signal. It comprises a buffer for temporarily storing the input signal, a write means for writing the input signal into the buffer, a clock-generating means for generating a clock signal, and a read means for reading the contents of the buffer at the recovered clock rate. According to the invention, the clock-generating means includes a calculating means for determining an average over the interval between two pointer actions of the input signal, and derives from the average a tuning signal which serves to adjust the recovered clock signal. In this manner, fitter caused by pointer actions which result from a constant offset of the effective bit rate of the received virtual containers is eliminated.
申请公布号 CA2271277(A1) 申请公布日期 1999.11.08
申请号 CA19992271277 申请日期 1999.05.06
申请人 ALCATEL 发明人 WOLF, MICHAEL
分类号 H04J3/07;(IPC1-7):H04L7/00;H04L12/20 主分类号 H04J3/07
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