| 摘要 |
PURPOSE:To improve latch-up resistance and the degree of integration by forming reverse conduction type and the same conduction type insular regions to a base body region and maximizing impurity concentration near the bottoms of each insular region. CONSTITUTION:A p type high-concentration impurity layer 2 is formed to a p- well forming prearranged section in an n type Si substrate 21. An n type high- concentration impurity layer 23 is shaped where separate from the layer 22. An n type epitaxial growth layer 24 is formed on the substrate 21. An impurity in the layers 22, 23 is diffused upward, and p type and n type insular regions 25, 26 having distribution in which impurity concentration is maximized near bottom and reduced toward upper sections are formed. A p-channel MOSFET is shaped in the region 25, and an n-channel MOSFET is shaped in the region 26, thus completing C-MOSFETs. Latch-up resistance is improved because the emitter grounding current amplification factor of a parasitic transistor is reduced by forming the C-MOSFETs in this manner. The degree of integration is increased easily because extents in the lateral direction of wells in the surface of the base body 21 are minimized. |
