| 摘要 |
PROBLEM TO BE SOLVED: To provide a PCM signal demodulation circuit that extracts an accurate clock signal by excluding a useless zero cross timing detection pulse produced due to a noise and then demodulates accurate data. SOLUTION: A zero cross point detection pulse (b) of a PCM signal (a) is fed to a PLL circuit to activate it. In this case, a +V detector 7, a -V detector 8 and a discrimination circuit 9 reference the width of a frequency before and after a zero cross point and a count circuit 6 references a generated time interval of the zero cross detection pulse and when at least either of the both does not satisfy an allowable value, an OR gate 10 outputs a reset pulse (g) to regard it that the zero cross point detection pulse (b) is based on a noise and to interrupt the loop of the PLL circuit. |
