发明名称 Multi-level conductive structure including low capacitance material
摘要 A method for forming a multi-level conductive structure on an integrated circuit. The method includes forming a first conductive layer 108 and forming a first dielectric layer 112 above the first conductive layer. The method further includes forming a second conductive layer 302 above the first dielectric layer. There is also included etching through the second conductive layer and at least partially into the first dielectric layer to form a trench 706 in the second conductive layer and the first dielectric layer, thereby removing at least a portion of the dielectric layer and forming a first conductive line 503 and a second conductive line 505 in the second conductive layer. Further, the method includes depositing a low capacitance material 908 into the trench. The low capacitance material represents a material having a dielectric constant lower than a dielectric constant of the first dielectric layer.
申请公布号 US5977635(A) 申请公布日期 1999.11.02
申请号 US19970939208 申请日期 1997.09.29
申请人 SIEMENS AKTIENGESELLSCHAFT 发明人 TOBBEN, DIRK;WEIGAND, PETER
分类号 H01L21/768;H01L21/8242;H01L23/522;H01L23/532;H01L27/10;H01L27/108;(IPC1-7):H01L23/48 主分类号 H01L21/768
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