| 摘要 |
An input/output device for use with an array of memory cells having a digitline and a complement of the digitline running through the array is fabricated on a substrate having active areas formed therein. Sensing transistors have terminals fabricated in the active areas which are responsive to the digitline and the complement of the digitline for sensing signals thereon in a read operation. Switching transistors have terminals fabricated in the active areas which are responsive to the sensing transistors for selectively conducting the signals sensed by the sensing transistors. Certain terminals of the sensing transistors and certain terminals of the switching transistors are fabricated in the same active area.
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