| 摘要 |
PURPOSE:To switch an output frequency at a high speed in response to the change in a frequency division ratio without sacrifycing the resolution by providing an integration circuit and a sample-and-hold circuit, leading a signal from a phase detector and providing a period averaging circuit giving a control signal being the result of the conversion of the signal from the phase detector into a DC signal to a VCO. CONSTITUTION:The titled circuit is provided with the period averaging circuit 40 consisting of an integration circuit 20 and a sample-and-hold circuit 30, leading a signal from a phase detector, converting the said signal into a DC signal as a control signal S0, and giving the signal to a VCO (voltage controlled oscillator). The period averaging circuit 40 uses a parallel circiut comprising a resistor 10 and a capacitor 11 to receive an output signal s3 of the phase detector 3 and leads the said signal to the integration circuit 20 of th next stage. The integration circuit 30 consists of, e.g., an integration capacitor 13, an amplifier 12 and a feedback resistor 18 between an input terminal of the integration circuit and an output terminal of the sample-and-hold circuit 30 explained later.
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