发明名称 TWO-DIMENSIONAL ADDRESS GENERATOR
摘要 PURPOSE:To shorten the interval of data accessing to a memory by generating two-dimensional addresses with use of two independent address counters. CONSTITUTION:When a memory access start instruction is outputted, an initial value is set up in a row address initial value register 5 and a column address initial value register 6 and a memory access word length is set up in a word length counter 8. Then, an address counter is enabled to count and driven in accordance with 4-row direction access or column direction access under the control by a mode register so as to increase or decrease its contents in accordance with count-up or count-down mode. The word length counter 8 also counts up its contents every generation of one address. When the counter 8 ends the counting corresponding to the generated addresses and a carry is inputted to a mode register 7, the generation of addresses is stopped.
申请公布号 JPS62237541(A) 申请公布日期 1987.10.17
申请号 JP19860080767 申请日期 1986.04.08
申请人 MITSUBISHI ELECTRIC CORP 发明人 HARA YOSHIHISA
分类号 G06F12/00;G06F12/02;G06T1/60;G11C7/00;G11C8/00 主分类号 G06F12/00
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