发明名称 |
Data processor |
摘要 |
A data processor in accordance with the present invention makes it possible to perform pre-branch processing with respect to a return address in the initial stage of pipeline processing also on a subroutine return instruction, and therefore by providing a stack memory (PC stack) dedicated to a program counter (PC) for storing only return addresses of the subroutine return instruction, in executing a subroutine call instruction in an execution stage of a pipeline processing mechanism, the return address from the subroutine is pushed to the PC stack, and the pre-branch processing is performed to the address popped from the PC stack in decoding the subroutine return instruction in an instruction decoding stage.
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申请公布号 |
US5978904(A) |
申请公布日期 |
1999.11.02 |
申请号 |
US19970996787 |
申请日期 |
1997.12.23 |
申请人 |
MITSUBISHI DENKI KABUSHIKI KAISHA |
发明人 |
MATSUO, MASAHITO;YOSHIDA, TOYOHIKO |
分类号 |
G06F9/32;G06F9/38;G06F9/40;(IPC1-7):G06F9/38 |
主分类号 |
G06F9/32 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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