发明名称 MANUFACTURE FOR ELECTRONIC DEVICE
摘要 PROBLEM TO BE SOLVED: To flatten a step of a wiring conductor caused by via holes for improving a wiring density of a multilayer wiring board. SOLUTION: After forming via holes 16 through an insulating layer formed on a board 11, a conductive film of a electric supplying layer is formed on whole surface. Resist is formed on the film in a negative form of a wiring pattern, and a pattern plating is performed by using an electric copper plating method until dents in via holes are made flat. Next, after etching of the plating film up to the layer less than a predetermined film thickness by electrolytic plating, plating is performed until a predetermined film thickness. Lastly, the resist and the electronic supplying film are eliminated. By repeating these processes, a circuit having a multi-layer and a fine wiring is formed.
申请公布号 JPH11298141(A) 申请公布日期 1999.10.29
申请号 JP19980095684 申请日期 1998.04.08
申请人 HITACHI LTD 发明人 YAMAZAKI TETSUYA;TENMYO HIROYUKI;SHIGI HIDETAKA;NARIZUKA YASUNORI
分类号 H05K3/22;H05K3/24;H05K3/46;(IPC1-7):H05K3/46 主分类号 H05K3/22
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