发明名称 |
RECONSTITUTABLE COPROCESSOR FOR DATA PROCESSING SYSTEM |
摘要 |
<p>PROBLEM TO BE SOLVED: To provide a data processing coprocessor by containing the plural pairs of multipliers, a plurality of first adders receiving respective product outputs from the plural pairs of multipliers and a second adder receiving sum outputs from a pair of corresponding first adders. SOLUTION: The plural pairs of multipliers, a plurality of first adders receiving respective product outputs from the plural pairs of multipliers and a second adder receiving sum outputs from a pair of corresponding first adders are contained. Code extension circuits are contained in respective multiplier outputs in a coprocessor 140. One mtultiplier in each pair has a fixed length left shift circuit shifting product output to a left direction by the previously decided number of bits. The other multiplier in each pair contains a right shift circuit shifting product output to a right direction by the same number of bits. The reconstitution possible hardware coprocessor 140 is connected to an integrated circuit and the other parts through a data bus 101 and an address bus 103.</p> |
申请公布号 |
JPH11296493(A) |
申请公布日期 |
1999.10.29 |
申请号 |
JP19990027805 |
申请日期 |
1999.02.04 |
申请人 |
TEXAS INSTR INC <TI> |
发明人 |
GATHERER ALAN;CARL E LEMONDOS JR;DALE E HOSEBAR;CHIN YUU FUN |
分类号 |
G06F15/16;G06F7/48;G06F7/544;G06F9/302;G06F9/38;(IPC1-7):G06F15/16 |
主分类号 |
G06F15/16 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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