发明名称 1 CHIP MICROCOMPUTER
摘要 PROBLEM TO BE SOLVED: To provide a 1 chip microcomputer for reducing the work load on a user at the time of preparing ECC(error collection code) data, preventing increase of an EEPROM(electrical erasable programmable read only memory) writing time based on the ECC data, and reducing a memory capacity. SOLUTION: This 1 chip microcomputer is provided with a firm ROM 5 for storing a program for generating ECC data from user data and an EEPROM control circuit 7 for controlling wiring of user data and the ECC data in an EEPROM 8. A CPU 2 stores the ECC data generated by the program of the firm ROM 5 from the user data and the original user data in a user data area 83 and an ECC data area 84 of the EEPROM 8 according to the control of the EEPROM control circuit 7, and reads the user data in the user data area 83 and the ECC data in the ECC data area 84 for successively operating an error correction processing.
申请公布号 JPH11296392(A) 申请公布日期 1999.10.29
申请号 JP19980097287 申请日期 1998.04.09
申请人 NEC CORP 发明人 FUKUSHIMA KIYOSHI
分类号 G06F11/10;G06F12/16;G06F15/78 主分类号 G06F11/10
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