| 摘要 |
PROBLEM TO BE SOLVED: To provide a parallel operation processor which enables reuse of past programs and has contraction operation performance improved. SOLUTION: This device 1 has each of plural arithmetic units (#0 to #N-1) provided with a mask register (41), controls prohibition/permission of write of a register group 21 in accordance with this mask register output, controls a connection path of a selector 43, and connects either of the register group 21 or an input port 23 to an output port 24. It is possible to set the number of arithmetic units which can operate in accordance with a program, the past programs can be reused, and high-speed execution of contraction operation is enabled. |
