发明名称 GRAPHICS PROCESSOR ARCHITECTURE
摘要 <p>The display system includes a display controller which renders text and graphics and writes it to the RAM. The display controller then reads the rendered information from the RAM and activates a display based upon that information. Generally the display controller reads information from the display controller and activates the display at a constant refresh rate; however, when a large number of text and/or graphics to be rendered have accumulated, the display controller temporarily reduces the refresh rate in order to render and write the text and/or graphics to the RAM.</p>
申请公布号 WO1999054864(A1) 申请公布日期 1999.10.28
申请号 US1999007955 申请日期 1999.04.12
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