| 摘要 |
<p>A sense amplifier (200) for use in a serial configuration memory includes multiple stages which are enabled and disabled in a controlled manner (270), in response to a control pulse (SAEN). The control pulse (SAEN) is produced every Nth period of an externally provided clock signal, the clock being used to clock out a bitstream representing the contents of the memory device. In a preferred embodiment, N such sense amps (200) are utilized to read out in parallel fashion the N memory cells (bits) comprising an accessed memory location. The sense amps (200) are therefore active only of a period of time sufficient to read out a memory cell.</p> |
