发明名称 A frequency and timing synchronization circuit making use of a chirp signal
摘要 To surely detect a frequency shift and a timing difference of a received signal making use of a chirp signal even when the C/N ratio of the received signal is low by resolving the problem of resolution of FFT processing, a frequency and timing synchronization circuit comprises: a chirp signal generator (6) for generating a reference chirp signal and a conjugate complex signal of the reference chirp signal; a first demodulator (7) for obtaining a first in-phase complex signal and a first quadrature-phase complex signal by demodulating the received signal with the reference chirp signal and the conjugate complex signal; a frequency offset circuit (5) for obtaining an offset signal by shifting a frequency of the received signal; a second demodulator (8) for obtaining a second in-phase complex signal and a second quadrature-phase complex signal by demodulating the offset signal with the reference chirp signal and the conjugate complex signal; and a detector unit (9) for detecting the frequency shift and difference of the synchronization timing according to a first peak frequency giving a maximum power spectrum among frequency components of the first and the second in-phase complex signal, and a second peak frequency giving a maximum power spectrum among frequency components of the first and the second quadrature-phase complex signal. <IMAGE>
申请公布号 EP0952713(A2) 申请公布日期 1999.10.27
申请号 EP19990250131 申请日期 1999.04.23
申请人 NEC CORPORATION 发明人 TANAKA, HIROSHI
分类号 H04L27/22;H04B1/69;H04B1/707;H04L7/00;H04L27/26 主分类号 H04L27/22
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