发明名称 |
EEPROM transistor for a DRAM |
摘要 |
A floating gate transistor is formed by simultaneously creating buried contact openings on both EEPROM transistor gates and DRAM access transistor source/drain diffusions. Conventional DRAM process steps are used to form cell storage capacitors in all the buried contact openings, including buried contact openings on EEPROM transistor gates. An EEPROM transistor gate and its associated cell storage capacitor bottom plate together forms a floating gate completely surrounded by insulating material. The top cell storage capacitor plate on an EEPROM transistor is used as a control gate to apply programming voltages to the EEPROM transistor. Reading, writing, and erasing the EEPROM element are analogous to conventional floating-gate tunneling oxide (FLOTOX) EEPROM devices. In this way, existing DRAM process steps are used to implement an EEPROM floating gate transistor nonvolatile memory element. |
申请公布号 |
US5973344(A) |
申请公布日期 |
1999.10.26 |
申请号 |
US19970831361 |
申请日期 |
1997.04.01 |
申请人 |
MICRON TECHNOLOGY, INC. |
发明人 |
MA, MANNY K.F.;LIU, YAUH-CHING |
分类号 |
H01L21/8239;H01L21/8242;H01L27/105;(IPC1-7):H01L27/108;H01L29/76;H01L29/94;H01L31/119 |
主分类号 |
H01L21/8239 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|