Output buffer circuit

摘要

An output buffer circuit for controlling operation of an input and output terminal utilizing a pair of MOS Transistors respectively formed in first and second wells in a substrate. The input and output terminal is connected commonly to the source of the first MOS transistor, to the drain of the second MOS transistor and to the well of the first MOS transistor in order to hold the well at the same potential as the input and output terminal. Also included is a first potential point applying a first potential to the drain of the first MOS transistor and a second potential apply commonly to the source and the well electrode of the second MOS transistor. The resulting structure controls the operating state of the input and output terminal in a manner which allows for an enhanced output potential.