Computer address translation system and method for converting effective or logical address to physical address

摘要

A computer address translation method and system applicable in CPUs for translating an effective address and a selector address into a physical address under the control of an invalidity signal through a translation lookaside buffer having a stored first address and a stored second address. An effective address and a selector address are simultaneously input to the translation lookaside buffer such that address translation and linear address production are parallel processed, thereby effectively speeding up the address translation process.