发明名称 REDUNDANT CLOCK AND FRAME PULSE SYNCHRONIZATION SYSTEM
摘要 Apparatus and method for synchronizing data signals transferred between independent processors within a communication system. The data signals are received from a first one of the processors synchronized to a first clock signal, and are then latched into a dual port RAM synchronized to a second clock signal. according to a preferred embodiment, the data signals are PCM signals which are loaded into the dual port RAM in accordance with address signals corresponding to PCM channel numbers associated with the first processor, and the data signals are read from the dual port RAM in accordance with address signals corresponding to PCM channel numbers associated with the second processor.
申请公布号 CA1302594(C) 申请公布日期 1992.06.02
申请号 CA19880571908 申请日期 1988.07.13
申请人 MITEL CORPORATION 发明人 GRAY, THOMAS A.
分类号 H04J3/06;H04L7/033 主分类号 H04J3/06
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