发明名称 Stacked capacitor structure for high density DRAM cells
摘要 A structure of a capacitor on a semiconductor wafer including the following structure is disclosured herein. A first electrode is formed on the semiconductor wafer. The first electrode includes a flower structure. The first electrode is formed on the semiconductor wafer. The first electrode includes a flower structure. The first electrode includes a flower neck portion, a flower bottom portion, and a flower top portion. The flower neck portion is electrically coupled to the semiconductor wafer. The flower bottom portion is electrically coupled to the flower neck portion, in which the flower bottom portion includes a first protudent portion. The flower top portion includes a downward hemispherical portion and a second protrude portion. The flower top portion is electrically coupled to the flower neck portion. A first dielectric film formed on the first electrode, and the first dielectric layer is the dielectric layer of the capacitor. A second electrode is formed on the first dielectric film.
申请公布号 US5973350(A) 申请公布日期 1999.10.26
申请号 US19980060565 申请日期 1998.04.14
申请人 TEXAS INSTRUMENTS - ACER INCORPORATED 发明人 WU, SHYE-LIN
分类号 H01L21/8242;H01L27/108;(IPC1-7):H01L27/108 主分类号 H01L21/8242
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